I. Field of the Disclosure
The technology of the disclosure relates generally to three-dimensional (3D) integrated circuits (IC) (3DICs) and their use for processor cores, including central processing unit (CPU) cores and other digital processor cores.
II. Background
In processor-based architectures, memory structures are used for data storage. An example of a memory structure is a register. A register is a small amount of storage available as part of a processing unit, such as a central processing unit (CPU) or other digital processor. Registers are used for temporary storage of data as part of instruction executions by the arithmetic and logic unit (ALU). Registers have faster access times than main memory. Data from memory such as a cache memory is loaded into registers by operation of instructions to be used for performing arithmetic operations and manipulation. The manipulated data stored in a register is often stored back in main memory, either by the same instruction or a subsequent instruction.
A register file is an array of process registers in a processing unit. The register file plays a key role in processor operations, because it is usually the busiest storage unit in a processor-based system. Modem integrated circuit-based register files are usually implemented by way of fast static random access memories (SRAMs) with multiple ports. SRAM-based register files have dedicated read and write ports to provide for faster read and write access, whereas ordinary multi-ported SRAMs share read and write accesses through the same ports.
Register files have several characteristics that can affect their performance. For example, providing larger register files requires a large footprint area in an integrated circuit (IC). Larger footprint areas can increase register file access latency. Larger footprint areas can also increase peripheral logic areas and produce retiming arcs for other components placed around the register files. Multiple supply voltage rails may be used to provide sufficient voltage to avoid inadvertent flips in the stored bit due to insufficient static noise margins (SNMs) and read/write (R/W) noise margins (RWNMs). If multiple power supply rails are provided inside the register file to be able to separately supply and lower supply voltage for SRAM read access ports, additional area in the IC will be required for the register file. Many of these issues are exacerbated in multi-core processing units such as are used in many conventional computers.